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november 2014 docid026092 rev 3 1/26 26 TN1171 technical note description of ufdfpn5, ufdfpn8 and wfdfpn8 for stmicroelectronics eeproms and recommendations for use introduction this document describes the following dual flat no-lead package (dfn) 5 and 8 leads used for stmicroelectronics eeprom products, and provides recommendation on how to use them: ? ufdfpn5 ? ufdfpn8 ? wfdfpn8 during recent years st conducted research on next-generation chip-size packaging (csp). the dfn is a near csp plastic enca psulated package using conventional copper lead frame technology. this construction be nefits from being a cost effective advanced packaging solution which helps to maximize board space with improved electrical and thermal performance over traditional leaded packages. such a package is a leadless package, with low profile (less than 1.0 mm), where electrical contact to the pcb is made by soldering the lands on the bottom surface of the package to the pcb, instead of the conventional formed leads. the dfns are molded in one solid array. individual units are singulated using a saw. warning: this technical note is widely distributed and the list of applicable products is constantly evolving. please verify the product under consideration does include at least one of the packages described herein before assuming this document applies. www.st.com
contents TN1171 2/26 docid026092 rev 3 contents contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 device marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 packing specifications and labeling description . . . . . . . . . . . . . . . . . 10 4.1 carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 cover tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.3 reels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.4 final packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5 labeling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.6 storage and shipping recommendations . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 surface mount considerations for dfn pack age . . . . . . . . . . . . . . . . . 14 6 pcb design guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.1 perimeter pads design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6.2 pcb central pad guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7 stencil design for perimeter pads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8 stencil thickness and solder paste . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 9 solder joint standoff height and fillet formation . . . . . . . . . . . . . . . . . 18 10 reflow soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 11 inspections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 12 x-ray inspections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 13 package changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
docid026092 rev 3 3/26 TN1171 contents 26 14 package quality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 14.1 electrical inspection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 14.2 visual inspection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 15 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
overview TN1171 4/26 docid026092 rev 3 1 overview the dfn is available in 3 formats. the smallest being the ufdfpn5 (5 leads) with body size of 1.7x1.4 mm and body thickness is 0.55 mm. the consumer one ufdfpn8 (8 leads) with body size of 2.0x3.0 mm and body thickness is 0.55 mm. the automotive one wfdfpn8 (8 leads) with body size of 2.0x3.0 mm and body thickness is 0.75 mm. ufdfpn8/wfdfpn8 comply with jedec outline mo-229. the dfn family has been desi gned to fulfill the same qualit y levels and same reliability performance as standard semiconductor plas tic packages. as a consequence these dfn can be considered as standard surface mount devices which are assembled on a printed circuit board (pcb) without any spec ial or additional process steps. only lead-free rohs / haloge n free compliant dfn are available in mass production. figure 1. ufdfpn5 figure 2. ufdfpn8/wfdfpn8
docid026092 rev 3 5/26 TN1171 mechanical data 26 2 mechanical data figure 3. ufdfpn5 1.7x1.4x0.55 5l pitch 0.4 package outline table 1. ufdfpn5 1.7x1.4x0.55 5l pitch 0.4 mechanical data symbol millimeters inches (1) 1. values in inches are converted from mm and rounded to four decimal digits. min typ max min typ max a 0.5 0.55 0.6 0.0197 0.0217 0.0236 a1 0 - 0.05 0 - 0.002 b (2) 2. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from the terminal tip. 0.18 0.22 0.26 0.0071 0.0087 0.0102 d 1.6 1.7 1.8 0.063 0.0669 0.0709 e 1.3 1.4 1.5 0.0512 0.0551 0.0591 d1 1.4 1.5 1.6 0.0551 0.0591 0.063 e1 0.18 0.22 0.26 0.0071 0.0087 0.0102 e - 0.4 - - 0.0157 - l 0.5 0.55 0.6 0.0197 0.0217 0.0236 l1 - 0.1 - - 0.0039 - k - 0.4 - - 0.0157 - $8.b0(b9 %rwwrpylhz sdgvvlgh ' ( e n / h 3lq 7rsylhz pdunlqjvlgh ' ( 6lghylhz $ $ 3lqlqgh[duhd /
mechanical data TN1171 6/26 docid026092 rev 3 figure 4. ufdfpn8 8-lead ultra thin fine pitch dual flat package no lead 2x3 mm package outline table 2. ufdfpn8 8-lead ultra thin fine pitch dual flat package no lead 2x3 mm mechanical data symbol millimeters inches (1) 1. values in inches are converted from mm and rounded to four decimal digits. min typ max min typ max a 0.45 0.55 0.6 0.0177 0.0217 0.0236 a1 0 0.02 0.05 0 0.0008 0.002 b 0.2 0.25 0.3 0.0079 0.0098 0.0118 d 1.9 2 2.1 0.0748 0.0787 0.0827 d2 1.2 - 1.6 0.0472 - 0.063 e 2.9 3 3.1 0.1142 0.1181 0.122 e2 1.2 - 1.6 0.0472 - 0.063 e - 0.5 - - 0.0197 - k 0.3 - - 0.0118 - - l 0.3 - 0.5 0.0118 - 0.0197 l1 - - 0.15 - - 0.0059 l3 0.3 - - 0.0118 - - eee (2) 2. applied for exposed die paddle and terminals. excludes embedding part of exposed die paddle from measuring. - 0.08 - 0.0031 =:b0(h9 > ? > ? >? w]v < 3lq,'pdunlqj
docid026092 rev 3 7/26 TN1171 mechanical data 26 figure 5. wfdfpn8 8-lead thin fine pitch dual flat package no lead package outline table 3. wfdfpn8 8-lead thin fine pitch dual flat package no lead mechanical data symbol millimeters inches (1) min typ max min typ max a 0.7 0.75 0.8 0.0276 0.0295 0.0315 a1 0.025 0.045 0.065 0.001 0.0018 0.0026 b 0.2 0.25 0.3 0.0079 0.0098 0.0118 d 1.9 2 2.1 0.0748 0.0787 0.0827 e 2.9 3 3.1 0.1142 0.1181 0.122 e - 0.5 - - 0.0197 - l1 - - 0.15 - - 0.0059 l3 0.3 - - 0.0118 - - nx (2) 88 nd (3) 44 aaa 0.15 - - 0.0059 - - bbb 0.1 - - 0.0039 - - ccc0.1--0.0039-- ddd 0.05 - - 0.002 - - $<b0(b9 7rsylhz 3lq,'pdunlqj 6lghylhz 6hdwlqjsodqh %rwwrpylhz 'dwxp< 7huplqdowls 'hwdlo3= 6hh= 'hwdlo hhh / / / ( ( 1;e ' ' ( 1'[h . h ' $ $ # & h 'dwxp< eee ggg & & - - 3lq $ % ddd # [ ddd # [ fff # $ % h
mechanical data TN1171 8/26 docid026092 rev 3 eee (4) 0.08 - - 0.0031 - - d2 1.05 - 1.65 0.0413 - 0.065 e2 1.05 - 1.45 0.0413 - 0.0571 k 0.45 - - 0.0177 - - l 0.3 - 0.5 0.0118 - 0.0197 1. values in inches are converted from mm and rounded to four decimal digits. 2. nx is the number of terminals. 3. nd is the number of terminals on "d" sides. 4. applied for exposed die paddle and terminals. ex cluding embedding part of exposed die paddle from measuring. table 3. wfdfpn8 8-lead thin fine pitch dual flat package no lead mechanical data (continued) symbol millimeters inches (1) min typ max min typ max
docid026092 rev 3 9/26 TN1171 device marking 26 3 device marking figure 6. ufdfpn5 device marking 1. pin 1 identification figure 7. ufdfpn8 device marking 1. pin 1 identification figure 8. wfdfpn8 device marking 1. pin 1 identification 069 % & ' ( 3dfndjh)dfh 7rs /hjhqg 8qpdundeohvxuidfh 0dunlqjfrpsrvlwlrqilhog $ 675,3(3,1,'(17 % & ' ( 0dunlqjduhd $vvhpeo\sodqw3 $vvhpeo\\hdu< $vvhpeo\zhhn:: $ 069 $ % & ' ( 3dfndjh)dfh 7rs /hjhqg 8qpdundeohvxuidfh 0dunlqjfrpsrvlwlrqilhog $ '27 % & ' ( 0dunlqjduhd $vvhpeo\sodqw3 $vvhpeo\\hdu< $vvhpeo\zhhn:: 069 $ % & ' ( 3dfndjh)dfh 7rs /hjhqg 8qpdundeohvxuidfh 0dunlqjfrpsrvlwlrqilhog $ '27 % & ' ( 0dunlqjduhd $vvhpeo\sodqw3 $vvhpeo\\hdu< $vvhpeo\zhhn:: ) 6xeorwdvvhpeo\66 )
packing specifications and labeling description TN1171 10/26 docid026092 rev 3 4 packing specifications and labeling description dfn devices are delivered in tape and reel to be fully compatible with standard high volume smd components. all tape and reel characteristics are compliant with eia-481-c and iec 60286-3 standards and eia 763 (783). 4.1 carrier tape the dfn are placed in carrier tapes with their leads side facing the bottom of the cavity so that the devices can be picked up by their flat side. the devices are positioned in the carrier tape with pin 1 on the sprocket hole side. an example of carrier tape mechanical dimensions is shown in figure 9 . the standard tape width is 12 mm. figure 9. typical tape dimensions for dfn packages no hole is present in the cavity to avoid any external contamination. the embossed carrier tape is in a black conduc tive material (surface resistivity within 10 4 and 10 8 ? /sq). using this material prevents the component from being damaged by electrostatic discharge and ensures the total discharge of the component prior to the placement on the pcb. conductivity is guarant eed to be constant and is not affected by shelf life or humidity. the material does no t break when bent and does not have any powder or flake residue that rubs off. 4.2 cover tape the carrier tape is sealed with a transparent antistatic (surface resistivity ranging from 10 5 ? /sq to 10 12 ? /sq) polyester film cover tape using a heat activated adhesive. the cover tape tensile strength is higher than 10 n.
docid026092 rev 3 11/26 TN1171 packing specifications and labeling description 26 the peeling force of the cover tape ranging fr om 0.1 n to 0.7 n in accordance with the testing method eia-481-c and iec 60286-3. co ver tape is peeled back in the direction opposite to the carrier tape travel. the angle between the cover tape and the carrier tape is between 165 and 180 , and the test is performed at a speed of 120 10 % mm/min. 4.3 reels the sealed carrier tape containing the dfn is reeled on 7-inch reels (see figure 10 and table 4 for reel mechanical dimensions). these reels are compliant with eia-481-c standard. in particular, they are made of an antistatic polystyrene material. the reel color may vary depending on supplier. dice quantity per reel is 2500. a reel may contai n devices coming from 2 different wafer lots. the reels have a minimum leader of 600 mm and a minimum trailer of 160 mm (in compliance with eia-481-c and iec 60286-3 standards). the leader makes up a portion of carrier tape with empty cavities and sealed by cover tape at the beginning of the reel (external side). it is affixed to the last turn of the carrier tape by using adhesive tape. the trailer is located at the end of the reel and consists of empty sealed cavities. figure 10. 7-inch reel schematics -). # . 2%& ! 2%& 7 7 $ 530!4 -)..%!0/,)353! 2 !44%.4)/. %lectrostatic3ensitive$evices 3afe(andling2equired ,/+2%%, 2 !)c 7
packing specifications and labeling description TN1171 12/26 docid026092 rev 3 4.4 final packing each reel is heat-sealed under inert atmosphere in a transparent recyclable antistatic polyethylene bag (minimum of 4 mils mate rial thickness). reels are then packed in cardboard boxes. a full description of the packing process is shown in figure 11 . figure 11. packing process 4.5 labeling to trace each production lot and shipment lot, the 7-inch reels and the cardboard box are identified by labels that mention the devi ce part number, the shipped quantity and traceability information. the trace code printed on the labels ensures backward traceab ility from the lot received by the customer to each step of the process. it includes in/ out dates, as well as quantities during diffusion, assembly, test phase, and in th e final storage. likewis e, forward traceability is able to trace a lot history from the wafer fab to the customer location. 4.6 storage and shippi ng recommendations dfn reels are packed under inert n2 atmosphere in a sealed bag. for shipment and handling, reels are packed in a cardboard box. table 4. 7-inch reel dimensions reel w1 (mm) (1)(2) w2 (mm) (2) w3 (mm) a (mm) c (mm) d (mm) n (mm) 7?? 12.8 (typ) 18.2 (max) 12 177.8 (typ.) 13.0 (3) 20.2 (min) 100.0 (typ) 16.8 (typ) 22.2 (max) 16 24.8 (typ) 30.2 (max) 24 32.8 (typ) 38.2 (max) 32 44.8 (typ) 50.2 (max) 44 1. +0.6 mm, - 0.4 mm. 2. measured at the hub. 3. +0.5 mm, - 0.2 mm.
docid026092 rev 3 13/26 TN1171 packing specifications and labeling description 26 st consequently recommends the following shipping and storage conditions: ? relative humidity between 15 and 70 % ? temperature ranging from -55 to +150 c. ? components in a non opened sealed bag can be stored for 6 months after shipment. ? components in tape and reel must be protected from exposure to direct sunlight.
surface mount considerations for dfn package TN1171 14/26 docid026092 rev 3 5 surface mount considerations for dfn package in order to perform at peak, special considerations are needed to properly design the motherboard and to mount the package. for en hanced thermal, electrical, and board level performance, we recommend the exposed pad on the package to be soldered to the board using a corresponding pad on the board. the pcb footprint design needs to be considered from dimensional tolerances due to package, pcb, and assembly. a number of factors may have a significant effect on mounting dfn package on the board and the quality of solder joints. some of these factors include: amount of solder paste coverage in thermal pad region, stencil design fo r peripheral and thermal pad region, type of vias, board thickness, lead finish on the package, surface finish on the board, type of solder paste, and reflow profile. this information note proposes some guidelines for this purpose. it should be emphasized that this is just a guideline to help the user in developing the proper motherboard design and surface mount process.
docid026092 rev 3 15/26 TN1171 pcb design guidelines 26 6 pcb design guidelines as the lands on the package bottom side are rectangular in shape with rounded edge and since the package does not have any solder balls, the electrical connection between the package and the motherboard is made by printing the solder paste on the motherboard and reflowing it after component pl acement. in order to form reliable solder joints, special attention is needed in designing the motherboard pad pattern and solder paste printing. 6.1 perimeter pads design we recommend the pcb pad pattern to be designed based on industry standards such as ipc-sm-782. however, we recommend development of proper design using some experimental trials. for the purpose of this document, ipc?s methodology is used here for designing pcb pad pattern. there are two approaches in pcb pad designs, namely non-solder mask defined pad (nsmd) and solder masked defined pad (smd). the nsmd has an opening that is larger than the copper pad. the pcb pad area is controlled by the size of the copper pad. since the copper pad etching process is rather capable and stable, a smaller size copper pad can be defined accurately. as dfn are fine pitch and small outline packages, it is recommended to use the nsmd method to define the perimeter pad on the pcb. 6.2 pcb central pad guidelines the dfn package, with its exposed die pad soldered to the pcb has a good mechanical attach to the board. the mechanical performance of the package is greatly influenced by the pcb design. the pcb should be solder mask defined (smd). the pad area is controlled by the size of the solder mask opening. the size of the central pad land pattern should be equal to the exposed pad of the package. final ly, the solder mask opening should overlap the edges of the pcb thermal pad land by at least 0.065 mm on all four sides. board mounting guidelines because of the small lead surface area and the sole reliance on printed solder paste on the pcb surface, care must be taken to form relia ble solder joints for dfn packages. this is further complicated by the large thermal pad underneath the package and its proximity to the inner edges of the leads. special consider ations are needed in stencil design and paste printing for both perimeter and central pads. since surface mount process varies from company to company, careful process development is recommended. the following provides some guidelines for stencil design.
stencil design for perimeter pads TN1171 16/26 docid026092 rev 3 7 stencil design for perimeter pads the optimum and reliable solder joints on the perimeter pads should have about 50 to 75 microns (2 to 3 mils) standoff height and good side fillet on t he outside. a joint with good standoff height but no or low fillet will have reduced life but ma y meet application requirement. the first step in achieving good standoff is the solder paste stencil design for perimeter pads. the stencil aperture opening should be so designed that maximum paste release is achieved. this is typically accomp lished by considering the following two ratios: for rectangular aperture openings, as required for this package, these ratios are given as area ratio = lw/2t(l+w), and aspect ratio = w/t where l and w are the aperture length and width, and t is stencil thickness. for optimum paste release the area and aspect ratios should be greater than 0.66 and 1.5 respectively. it is recommended that the stencil aperture sh ould be 1:1 to pcb pad sizes as both area and aspect ratio targets are easily achieved by this aperture. the stencil should be laser cut and electro polished. the polishing helps in smoothing the stencil walls which results in better paste release. it is also recommended that the stencil aperture tolerances should be tightly controlled, especially for 0.4 and 0. 5 mm pitch devices, as these tolerances can effectively reduce the aperture size.
docid026092 rev 3 17/26 TN1171 stencil thickness and solder paste 26 8 stencil thickness and solder paste the stencil thickness of 0.100 mm is recommended for 0.4 and 0.5 mm pitch parts a laser- cut, stainless steel stencil is recommended with electro-polished trapezoidal walls to improve the paste release. since not enough space is available underneath the part after reflow, it is recommended that ?no clean?, type 3 paste be used for mounting dfn packages. nitrogen purge is also recommended during reflow.
solder joint standoff height and fillet formation TN1171 18/26 docid026092 rev 3 9 solder joint standoff height and fillet formation the solder joint standoff is a direct function of amount of paste coverage. the standoff height is also affected by the type and reacti vity of solder paste used during assembly; pcb thickness and surface finish, and reflow profile. the peripheral solder joint fillets formation is also driven by mu ltiple factors. it should be realized that only bottom surface of the leads are plated with solder and not the ends and the bare cu on the side of the leads may oxidiz e if the packages are stored in uncontrolled environment. it is, ho wever, possible that a solder f illet will be formed depending on the solder paste (flux) used and the level of oxidation. the fillet formation is also a function of pc b land size, printed so lder volume, and the package standoff height. since there is only limited solder available, higher standoff - controlled by paste coverage on the thermal pad ? may not le ave enough solder for fillet formation. conversely, if the standoff is too low, large co nvex shape fillets may form. since center pad coverage has the greatest impact on standoff height the volume of solder necessary to create optimum f illet varies. package standoff height and pcb pads size will establish the required volume.
docid026092 rev 3 19/26 TN1171 reflow soldering 26 10 reflow soldering the purpose of the reflow process is to melt the solder particles, wet the surfaces to be joined, and solidify the solder in to a stronger metallurgical bond. temperature profile is the most important contro l in reflow soldering and it must be fine- tuned to establish a robust process. df n components probably would be among the smallest devices on any pcb. in such case s, place thermocouples under the heaviest thermal mass device on the pcb to monitor the reflow profile. generally, when the heaviest thermal mass device reaches reflow temperatures, all other components on the pcb will reach reflow temperatures as well. for all devices on the pcb, the solder paste needs to be taken into account for the reflow profile. every paste has a flux, and the flux dominates the reflow profile for steps like soak time, soak temperature, and ramp rates. peak reflow temperature is the melting temperature of the metals in the paste, plus a ?safety? margin to ensure that all solder paste on the pcb reflows. the reflow profile should follow the paste supplier?s ?recommended? profile. since solder joints are not fully exposed in th e case of dfn, any retouch is limited to the side fillet. for defects underneath the pack age, the whole package has to be removed. rework of dfn packages can be a challenge due to their small size and is not recommended. in most applicatio ns, dfn will be mounted on sm aller, thinner, and denser pcbs that introduce further challenges due to handling and heating issues. since reflow of adjacent parts is not desirable during rework, the proximity of other components may further complicate this process.
inspections TN1171 20/26 docid026092 rev 3 11 inspections unlike traditional leaded components, the solder joints of dfn are formed underneath the package. the conventional visual inspection technique to check the quality of the solder joint is time consuming. whenever possible, optical inspection and x-ray inspection are recommended to verify any open or short circuit after reflow soldering.
docid026092 rev 3 21/26 TN1171 x-ray inspections 26 12 x-ray inspections x-ray is one way to detect solder shorts underneath the dfn package. x-rays transmitted from the x-ray tube are absorbed by the components in proportion to their density. in this case, a solder joint having a higher density absorbs most of the x-rays, and the resultant x- ray intensity is detected and interpreted in a gray scale image. the x-ray image is also a good instrument to view solder voids in the exposed pad region.
package changes TN1171 22/26 docid026092 rev 3 13 package changes stmicroelectronics reserves the right to implement minor changes of geometry and manufacturing processes without prior notice. such changes will not affect electrical characteristics. howeve r for confirmed orders, no variation with respect to the datasheet will be made without prior customer's approval.
docid026092 rev 3 23/26 TN1171 package quality 26 14 package quality 14.1 electrical inspection all the critical parameters defined in the dfn device datasheet are 100 % electrically characterized. the other parameters are guaranteed by technology, design rules or by continuous monitoring systems. 14.2 visual inspection a visual control is performed on all manufacturing lots according to jesd22_b101b specification.
conclusion TN1171 24/26 docid026092 rev 3 15 conclusion lead-free dfn have been developed by st microelectronics for electronic applications where integration and performanc e are designer?s main concerns. stmicroelectronics dfn key features are: ? remarkable board space saving: package size near die size and total height less than 800 m. ? enhanced electrical performa nce: minimized parasitic inductance due to very short electrical paths. dfn are delivered in tape and reel and are fully compatible with other high volume smd components (standard plastic packages or c sp/bga packages) in regards to existing pick- and-place equipment, standard solder reflow assembly equipment and standard pcb techniques.
docid026092 rev 3 25/26 TN1171 revision history 26 16 revision history table 5. document revision history date revision changes 25-mar-2014 1 initial release. 07-apr-2014 2 removed table on cover page. updated figure 5: wfdfpn8 8-lead thin fine pitch dual flat package no lead package outline . 25-nov-2014 3 updated stencil thickness in section 8: stencil thickness and solder paste .
TN1171 26/26 docid026092 rev 3 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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